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Rabbit 2000 Microprocessor User's Manual |
A
- B - C - D - E - F - G - H - I - J - K - L - M - N - O - P - Q - R - S - T - U - V - W - X - Y - Z
Index
A
- assembly language
- instructions 1, 2, 3, 4
- reading/writing to I/O registers 1
B
- battery-backup circuit 1
- bootstrap operation 1, 2
C
- chip selects 1
- clocks 1, 2
- 32.768 kHz 1
- 32.768 kHz oscillator 1
- clock doubler 1, 2
- distribution 1
- low-power 32.768 kHz oscillator 1
- low-power design 1
- main clock 1, 2
- oscillator circuits 1
- power consumption 1
- spectrum spreader 1, 2
- timer and clock use 1
- cold boot 1
- comparison Rabbit 2000 vs. Z80/Z180 1
- compiler 1
- crystal frequencies 1
D
- DDCB/FDCB instruction 1
- design features 1
- BIOS 1
- cold boot 1
- instruction set 1
- interrupt priorities 1
- memory support 1
- parallel I/O 1
- programming port 1
- serial ports 1
- slave port 1, 2
- system clock 1
- time/date clock 1
- timed output pulses 1
- timers 1
- Dynamic C 1, 2
- BIOS 1
- library functions 1
- periodic interrupts 1
- power consumption 1
- virtual drivers 1
- watchdog 1
E
- extended memory 1
- data memory windows 1
- practical considerations 1
- external bus
- read and write timing 1
- external interrupts
- control registers 1
G
- generating pulses 1
I
- instructions 1, 2
- alphabetic order 1
- arithmetic and logical ops 1
- I/O instructions 1
- load to constant address 1
- load to register 1
- load using index register 1
- push and pop 1
- register exchanges 1
- register-to-register move 1
- interrupts 1, 2, 3
- Dynamic C 1
- external interrupts 1, 2
- generating with Serial Port A
1- interrupt latency 1
- interrupt service vector addresses 1
- interrupt vectors 1
- multiple interrupts 1
- priorities 1, 2
- privileged instructions and semaphores 1
- semaphores 1
- serial port 1
- updating registers 1
- IOI/IOE prefix 1
L
- LDIR/LDDR Instruction/Data split 1
- low-power design 1
M
- memory
- A16, A19 inversions (/CS1 enable) 1
- access time 1, 2, 3
- allocation of extended code and data space 1
- compiler operation 1
- early output enable 1
- I and D space 1
- I/O access time (no extra wait state) 1
- I/O access time (one extra wait state) 1
- I/O read time delays 1
- I/O read/write times 1
- I/O write time delays 1
- Iand D space 1
- parameters 1
- read time delays 1
- write time delays 1
- memory interface 1, 2
- memory mapping 1
- memory mapping unit 1, 2, 3
- Modbus 1
O
- open-drain outputs 1
- operating frequency vs. temperature 1
- operating frequency vs. voltage 1
- operating power estimates 1
- oscillator 1
- main oscillator 1
- oscillators
- 32.768 kHz 1, 2
- main clock 1, 2
- output pins
- alternate assignment 1
P
- parallel ports 1
- Parallel Port A 1
- Parallel Port B 1
- Parallel Port C 1
- Parallel Port D 1
- open-drain outputs 1
- Parallel Port E 1
- pin descriptions
- alternate functions 1
- pinout
- PQFP package 1
- ports
- Rabbit slave port 1
- slave port lines 1
- slave port registers 1
- power 1
- power consumption 1, 2
- Dynamic C 1
- power management 1
- power usage, standby mode 1
- PQFP package
- LAND pattern 1
- mechanical dimensions 1
- pinout 1
- programming port 1
- alternate programming port
1- use as diagnostic port 1
- PWM output 1, 2
R
- Rabbit 2000
- block diagram 1
- comparison with Z80/Z180
1- crystal frequencies 1
- design features 1
- features 1
- list of advantages 1
- on-chip peripherals 1
- programing port 1
- revision history 1, 2
- specifications 1, 2, 3
- Rabbit 3000
- revision history 1
- Rabbit Semiconductor
- history 1
- registers 1
- accumulators 1
- alternate registers 1
- default values 1
- GCDR 1
- GCM0R 1
- GCM1R 1
- GCMxR 1
- GCPU 1, 2
- GCSR 1
- GOCR 1
- GREV 1, 2, 3
- I/O bank control 1
- I/O registers 1
- IBxCR 1
- index registers 1
- interrupt priority register 1
- interrupts 1
- MB0CR 1, 2
- MBxCR 1
- memory bank control 1
- memory mapping segments 1
- MMIDR 1
- MTCR 1, 2
- PADR 1
- PBDR 1
- PCDR 1
- PCFR 1
- PDBxR 1
- PDCR 1, 2
- PDDCR 1
- PDDDR 1
- PDDR 1
- PDFR 1
- PEBxR 1
- PECR 1, 2
- PEDDR 1
- PEDR 1
- PEFR 1
- processor identification 1
- GCPU 1
- GREV 1
- reading/writing to I/O registers 1
- revision-level ID 1
- RTCCR 1
- RTCxR 1
- serial port control registers 1
- serial port status registers 1
- serial ports 1
- SxAR 1
- SxCR 1
- SxDR 1
- SxLR 1
- SxSR 1
- shadow registers 1
- SPCR 1, 2, 3
- SPDxR 1
- SPSR 1, 2
- stack pointer 1
- status register 1
- SxCR 1
- SxLR 1, 2
- TACR 1, 2
- TACSR 1
- TATxR 1
- TBCR 1
- TBCSR 1
- TBLxR 1
- TBMxR 1
- Timer A 1
- WDTCR 1
- WDTTR 1
- XPC register 1, 2
- reset 1, 2
- revision history 1, 2
- chip selects 1
- clock spectrum spreader 1
- clocked serial command 1
- DDCB/FDCB instructions 1
- early I/O enable 1
- external interrupts 1
- I and D space 1
- ID registers for version 1
- improved battery backup 1
- IOI/IOE prefix 1
- LDIR/LDDR Instruction/Data split 1
- Long Stop Register 1
- RoHS 1
- wait states 1
S
- serial ports 1, 2
- 9th bit protocols 1
- asynchronous serial port 1
- baud rates 1
- clocked serial ports
(Ports A-B) 1- clocked serial timing 1
- controlling RS-485 driver and receiver 1
- data and parity bits 1
- data framing/Modbus 1
- extra stop bits, parity 1
- generating periodic interrupts 1
- interrupt service routines 1
- interrupts 1
- master/slave protocol 1
- receive serial data timing 1
- registers 1
- software recommendations 1
- synchronous serial port 1
- transmit serial data timing 1
- transmitting and detecting breaks 1
- transmitting dummy characters 1
- slave port 1, 2
- applications 1
- hardware design 1
- messaging protocol 1
- protocols 1
- R/W cycles 1
- registers 1
- typical connections 1
- specifications
- DC characteristics 1
- 3.3 V 1
- 5.0 V 1
- I/O buffer sinking and sourcing limits 1
- memory access times 1
- power consumption 1
- spectrum spreader 1, 2
- system clock 1
T
- timers 1
- Timer A 1
- Timer B 1
W
- watchdog timer 1
X
- XPC register 1
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