20. Instructions in Alphabetical Order With Binary Encoding


Rabbit 2000 Microprocessor User's Manual

20. Instructions in Alphabetical Order
With Binary Encoding

Spreadsheet Conventions

***ALTD ("A" Column) Symbol Key***
Flag	Description
f	ALTD selects alternate flags
fr	ALTD selects alternate flags and register
r	ALTD selects alternate register
s	ALTD operation is a special case

***IOI and IOE ("I" Column) Symbol Key***
Flag	Description
b	IOI and IOE affect source and destination
d	IOI and IOE affect destination
s	IOI and IOE affect source

***Flag Register Key***
S	Z	L/V ¹	C	Description
*				Sign flag affected
-				Sign flag not affected
	*			Zero flag affected
	-			Zero flag not affected
		L		L/V flag contains logical check result
		V		L/V flag contains arithmetic overflow result
		0		L/V flag is cleared
		*		L/V flag is affected
			*	Carry flag is affected
			-	Carry flag is not affected
			0	Carry flag is cleared
			1	Carry flag is set

¹ The L/V (logical/overflow) flag serves a dual purpose--L/V is set to 1 for logical operations if any of the four most significant bits of the result are 1, and L/V is reset to 0 if all four of the most significant bits of the result are 0.

Symbols


Rabbit	Z180	Meaning
b	b	Bit select: 000 = bit 0, 001 = bit 1, 010 = bit 2, 011 = bit 3, 100 = bit 4, 101 = bit 5, 110 = bit 6, 111 = bit 7
cc	cc	Condition code select: 00 = NZ, 01 = Z, 10 = NC, 11 = C
d	d	7-bit (signed) displacement. Expressed in two's complement.
dd	ww	Word register select destination: 00 = BC, 01 = DE, 10 = HL, 11 = SP
dd'		Word register select alternate: 00 = BC', 01 = DE', 10 = HL'
e	j	8-bit (signed) displacement added to PC.
f	f	Condition code select: 000 = NZ (non zero), 001 = Z (zero), 010 = NC (non carry), 011 = C (carry), 100 = LZ¹ (logical zero), 101 = LO² (logical one), 110 = P (sign plus), 111 = M (sign minus)
m	m	MSB of a 16-bit constant.
mn	mn	16-bit constant.
n	n	8-bit constant or LSB of a 16-bit constant.
r, g	g, g'	Byte register select: 000 = B, 001 = C, 010 = D, 011 = E, 100 = H, 101 = L, 111 = A
ss	ww	Word register select (source): 00 = BC, 01 = DE, 10 = HL, 11 = SP
v	v	Restart address select: 010 = 0x0020, 011 = 0x0030, 100 = 0x0040, 101 = 0x0050, 111 = 0x0070
xx	xx	Word register select: 00 = BC, 01 = DE, 10 = IX, 11 = SP
yy	yy	Word register select: 00 = BC, 01 = DE, 10 = IY, 11 = SP
zz	zz	Word register select: 00 = BC, 01 = DE, 10 = HL, 11 = AF

¹ Logical zero if all four of the most significant bits of the result are 0.

² Logical one if any of the four most significant bits of the result are 1.


Instruction Byte 1 Byte 2 Byte 3 Byte 4 clk A I S Z V C
ADC A,(HL) 10001110 5 fr s * * V * ADC A,(IX+d) 11011101 10001110 ----d--- 9 fr s * * V * ADC A,(IY+d) 11111101 10001110 ----d--- 9 fr s * * V * ADC A,n 11001110 ----n--- 4 fr * * V * ADC A,r 10001-r- 2 fr * * V * ADC HL,ss 11101101 01ss1010 4 fr * * V * ADD A,(HL) 10000110 5 fr s * * V * ADD A,(IX+d) 11011101 10000110 ----d--- 9 fr s * * V * ADD A,(IY+d) 11111101 10000110 ----d--- 9 fr s * * V * ADD A,n 11000110 ----n--- 4 fr * * V * ADD A,r 10000-r- 2 fr * * V * ADD HL,ss 00ss1001 2 fr - - - * ADD IX,xx 11011101 00xx1001 4 f - - - * ADD IY,yy 11111101 00yy1001 4 f - - - * ADD SP,d 00100111 ----d--- 4 f - - - * ALTD 01110110 2 - - - - AND (HL) 10100110 5 fr s * * L 0 AND (IX+d) 11011101 10100110 ----d--- 9 fr s * * L 0 AND (IY+d) 11111101 10100110 ----d--- 9 fr s * * L 0 AND HL,DE 11011100 2 fr * * L 0 AND IX,DE 11011101 11011100 4 f * * L 0 AND IY,DE 11111101 11011100 4 f * * L 0 AND n 11100110 ----n--- 4 fr * * L 0 AND r 10100-r- 2 fr * * L 0 BIT b,(HL) 11001011 01-b-110 7 f s - * - - BIT b,(IX+d)) 11011101 11001011 ----d--- 01-b-110 10 f s - * - - BIT b,(IY+d)) 11111101 11001011 ----d--- 01-b-110 10 f s - * - - BIT b,r 11001011 01-b--r- 4 f - * - - BOOL HL 11001100 2 fr * * 0 0 BOOL IX 11011101 11001100 4 f * * 0 0 BOOL IY 11111101 11001100 4 f * * 0 0 CALL mn 11001101 ----n--- ----m--- 12 - - - - CCF 00111111 2 f - - - * CP (HL) 10111110 5 f s * * V * CP (IX+d) 11011101 10111110 ----d--- 9 f s * * V * CP (IY+d) 11111101 10111110 ----d--- 9 f s * * V * CP n 11111110 ----n--- 4 f * * V * CP r 10111-r- 2 f * * V * CPL 00101111 2 r - - - - DEC (HL) 00110101 8 f b * * V - DEC (IX+d) 11011101 00110101 ----d--- 12 f b * * V - DEC (IY+d) 11111101 00110101 ----d--- 12 f b * * V - DEC IX 11011101 00101011 4 - - - - DEC IY 11111101 00101011 4 - - - - DEC r 00-r-101 2 fr * * V - DEC ss 00ss1011 2 r - - - - ss= 00-BC, 01-DE, 10-HL, 11-SP DJNZ j 00010000 --(j-2)- 5 r - - - - EX (SP),HL 11101101 01010100 15 r - - - - EX (SP),IX 11011101 11100011 15 - - - - EX (SP),IY 11111101 11100011 15 - - - -
EX AF,AF' 00001000 2 - - - - EX DE,HL 11101011 2 s - - - - EX DE',HL 11100011 2 s - - - - EX DE,HL' 01110110 11100011 4 s - - - - EX DE',HL' 01110110 11100011 4 s - - - - EXX 11011001 2 - - - - INC (HL) 00110100 8 f b * * V - INC (IX+d) 11011101 00110100 ----d--- 12 f b * * V - INC (IY+d) 11111101 00110100 ----d--- 12 f b * * V - INC IX 11011101 00100011 4 - - - - INC IY 11111101 00100011 4 - - - - INC r 00-r-100 2 fr * * V - INC ss 00ss0011 2 r - - - - ss= 00-BC, 01-DE, 10-HL, 11-SP IOE 11011011 2 - - - - IOI 11010011 2 - - - - IPSET 0 11101101 01000110 4 - - - - IPSET 1 11101101 01010110 4 - - - - IPSET 2 11101101 01001110 4 - - - - IPSET 3 11101101 01011110 4 - - - - IPRES 11101101 01011101 4 - - - - JP (HL) 11101001 4 - - - - JP (IX) 11011101 11101001 6 - - - - JP (IY) 11111101 11101001 6 - - - - JP f,mn 11-f-010 ----n--- ----m--- 7 - - - - JP mn 11000011 ----n--- ----m--- 7 - - - - JR cc,e 001cc000 --(e-2)- 5 - - - - JR e 00011000 --(e-2)- 5 - - - - Note: If byte following op code is zero, next sequential instruction is executed. If byte is -2 (11111110) jr is to itself. LCALL xpc,mn 11001111 ----n--- ----m--- --xpc--- 19 - - - - LD (BC),A 00000010 7 d - - - - LD (DE),A 00010010 7 d - - - - LD (HL),n 00110110 ----n--- 7 d - - - - LD (HL),r 01110-r- 6 d - - - - LD (HL+d),HL 11011101 11110100 ----d--- 13 d - - - - LD (IX+d),HL 11110100 ----d--- 11 d - - - - LD (IX+d),n 11011101 00110110 ----d--- ----n--- 11 d - - - - LD (IX+d),r 11011101 01110-r- ----d--- 10 d - - - - LD (IY+d),HL 11111101 11110100 ----d--- 13 d - - - - LD (IY+d),n 11111101 00110110 ----d--- ----n--- 11 d - - - - LD (IY+d),r 11111101 01110-r- ----d--- 10 d - - - - LD (mn),A 00110010 ----n--- ----m--- 10 d - - - - LD (mn),HL 00100010 ----n--- ----m--- 13 d - - - - LD (mn),IX 11011101 00100010 ----n--- ----m--- 15 d - - - - LD (mn),IY 11111101 00100010 ----n--- ----m--- 15 d - - - - LD (mn),ss 11101101 01ss0011 ----n--- ----m--- 15 d - - - - LD (SP+n),HL 11010100 ----n--- 11 - - - - LD (SP+n),IX 11011101 11010100 ----n--- 13 - - - - LD (SP+n),IY 11111101 11010100 ----n--- 13 - - - -

LD A,(BC) 00001010 6 r s - - - - LD A,(DE) 00011010 6 r s - - - - LD A,(mn) 00111010 ----n--- ----m--- 9 r s - - - - LD A,EIR 11101101 01010111 4 fr * * - - LD A,IIR 11101101 01011111 4 fr * * - - LD A,XPC 11101101 01110111 4 r - - - - LD dd,(mn) 11101101 01dd1011 ----n--- ----m--- 13 r s - - - - LD dd',BC 11101101 01dd1001 4 - - - - LD dd',DE 11101101 01dd0001 4 - - - - LD dd,mn 00dd0001 ----n--- ----m--- 6 r - - - - LD bc,mn 00000001 ... LD de,mn 00010001 ... LD hl,mn 00100001 ... LD sp,mn 00110001 ... LD EIR,A 11101101 01000111 4 - - - - LD HL,(HL+d) 11011101 11100100 ----d--- 11 r s - - - - LD HL,(IX+d) 11100100 ----d--- 9 r s - - - - LD HL,(IY+d) 11111101 11100100 ----d--- 11 r s - - - - LD HL,(mn) 00101010 ----n--- ----m--- 11 r s - - - - LD HL,(SP+n) 11000100 ----n--- 9 r - - - - LD HL,IX 11011101 01111100 4 r - - - - LD HL,IY 11111101 01111100 4 r - - - - LD IIR,A 11101101 01001111 4 - - - - LD IX,(mn) 11011101 00101010 ----n--- ----m--- 13 s - - - - LD IX,(SP+n) 11011101 11000100 ----n--- 11 - - - - LD IX,HL 11011101 01111101 4 - - - - LD IX,mn 11011101 00100001 ----n--- ----m--- 8 - - - - LD IY,(mn) 11111101 00101010 ----n--- ----m--- 13 s - - - - LD IY,(SP+n) 11111101 11000100 ----n--- 11 - - - - LD IY,HL 11111101 01111101 4 - - - - LD IY,mn 11111101 00100001 ----n--- ----m--- 8 - - - - LD r,(HL) 01-r-110 5 r s - - - - LD r,(IX+d) 11011101 01-r-110 ----d--- 9 r s - - - - LD r,(IY+d) 11111101 01-r-110 ----d--- 9 r s - - - - LD r,g 01-r---g 2 r - - - - LD r,n 00-r-110 ----n--- 4 r - - - - LD SP,HL 11111001 2 - - - - LD SP,IX 11011101 11111001 4 - - - - LD SP,IY 11111101 11111001 4 - - - - LD XPC,A 11101101 01100111 4 - - - - LDD 11101101 10101000 10 d - - * - LDDR 11101101 10111000 6+7i d - - * - LDI 11101101 10100000 10 d - - * - LDIR 11101101 10110000 6+7i d - - * - LDP (HL),HL 11101101 01100100 12 - - - - LDP (IX),HL 11011101 01100100 12 - - - - LDP (IY),HL 11111101 01100100 12 - - - - LDP (mn),HL 11101101 01100101 ----n--- ----m--- 15 - - - - LDP (mn),IX 11011101 01100101 ----n--- ----m--- 15 - - - - LDP (mn),IY 11111101 01100101 ----n--- ----m--- 15 - - - -
LDP HL,(HL) 11101101 01101100 10 - - - - LDP HL,(IX) 11011101 01101100 10 - - - - LDP HL,(IY) 11111101 01101100 10 - - - - LDP HL,(mn) 11101101 01101101 ----n--- ----m--- 13 - - - - LDP IX,(mn) 11011101 01101101 ----n--- ----m--- 13 - - - - LDP IY,(mn) 11111101 01101101 ----n--- ----m--- 13 - - - - LJP nbr,mn 11000111 ----n--- ----m--- --nbr--- 10 - - - - LRET 11101101 01000101 13 - - - - MUL 11110111 12 - - - - NEG 11101101 01000100 4 fr * * V * NOP 00000000 2 - - - - OR (HL) 10110110 5 fr s * * L 0 OR (IX+d) 11011101 10110110 ----d--- 9 fr s * * L 0 OR (IY+d) 11111101 10110110 ----d--- 9 fr s * * L 0 OR HL,DE 11101100 2 fr * * L 0 OR IX,DE 11011101 11101100 4 f * * L 0 OR IY,DE 11111101 11101100 4 f * * L 0 OR n 11110110 ----n--- 4 fr * * L 0 OR r 10110-r- 2 fr * * L 0 POP IP 11101101 01111110 7 - - - - POP IX 11011101 11100001 9 - - - - POP IY 11111101 11100001 9 - - - - POP zz 11zz0001 7 r - - - - PUSH IP 11101101 01110110 9 - - - - PUSH IX 11011101 11100101 12 - - - - PUSH IY 11111101 11100101 12 - - - - PUSH zz 11zz0101 10 - - - - RES b,(HL) 11001011 10-b-110 10 d - - - - RES b,(IX+d) 11011101 11001011 ----d--- 10-b-110 13 d - - - - RES b,(IY+d) 11111101 11001011 ----d--- 10-b-110 13 d - - - - RES b,r 11001011 10-b--r- 4 r - - - - RET 11001001 8 - - - - RET f 11-f-000 8/2 - - - - RETI 11101101 01001101 12 - - - - RL (HL) 11001011 00010110 10 f b * * L * RL (IX+d) 11011101 11001011 ----d--- 00010110 13 f b * * L * RL (IY+d) 11111101 11001011 ----d--- 00010110 13 f b * * L * RL DE 11110011 2 fr * * L * RL r 11001011 00010-r- 4 fr * * L * RLA 00010111 2 fr - - - * RLC (HL) 11001011 00000110 10 f b * * L * RLC (IX+d) 11011101 11001011 ----d--- 00000110 13 f b * * L * RLC (IY+d) 11111101 11001011 ----d--- 00000110 13 f b * * L * RLC r 11001011 00000-r- 4 fr * * L * RLCA 00000111 2 fr - - - * RR (HL) 11001011 00011110 10 f b * * L * RR (IX+d) 11011101 11001011 ----d--- 00011110 13 f b * * L * RR (IY+d) 11111101 11001011 ----d--- 00011110 13 f b * * L * RR DE 11111011 2 fr * * L * RR HL 11111100 2 fr * * L * RR IX 11011101 11111100 4 f * * L * RR IY 11111101 11111100 4 f * * L *
RR r 11001011 00011-r- 4 fr * * L * RRA 00011111 2 fr - - - * RRC (HL) 11001011 00001110 10 f b * * L * RRC (IX+d) 11011101 11001011 ----d--- 00001110 13 f b * * L * RRC (IY+d) 11111101 11001011 ----d--- 00001110 13 f b * * L * RRC r 11001011 00001-r- 4 fr * * L * RRCA 00001111 2 fr - - - * RST v 11-v-111 [v=2,3,4,5,7 only] 8 - - - - SBC (IX+d) 11011101 10011110 ----d--- 9 fr s * * V * SBC (IY+d) 11111101 10011110 ----d--- 9 fr s * * V * SBC A,(HL) 10011110 5 fr s * * V * SBC A,n 11011110 ----n--- 4 fr * * V * SBC A,r 10011-r- 2 fr * * V * SBC HL,ss 11101101 01ss0010 4 fr * * V * SCF 00110111 2 f - - - 1 SET b,(HL) 11001011 11-b-110 10 b - - - - SET b,(IX+d) 11011101 11001011 ----d--- 11-b-110 13 b - - - - SET b,(IY+d) 11111101 11001011 ----d--- 11-b-110 13 b - - - - SET b,r 11001011 11-b--r- 4 r - - - - SLA (HL) 11001011 00100110 10 f b * * L * SLA (IX+d) 11011101 11001011 ----d--- 00100110 13 f b * * L * SLA (IY+d) 11111101 11001011 ----d--- 00100110 13 f b * * L * SLA r 11001011 00100-r- 4 fr * * L * SRA (HL) 11001011 00101110 10 f b * * L * SRA (IX+d) 11011101 11001011 ----d--- 00101110 13 f b * * L * SRA (IY+d) 11111101 11001011 ----d--- 00101110 13 f b * * L * SRA r 11001011 00101-r- 4 fr * * L * SRL (HL) 11001011 00111110 10 f b * * L * SRL (IX+d) 11011101 11001011 ----d--- 00111110 13 f b * * L * SRL (IY+d) 11111101 11001011 ----d--- 00111110 13 f b * * L * SRL r 11001011 00111-r- 4 fr * * L * SUB (HL) 10010110 5 fr s * * V * SUB (IX+d) 11011101 10010110 ----d--- 9 fr s * * V * SUB (IY+d) 11111101 10010110 ----d--- 9 fr s * * V * SUB n 11010110 ----n--- 4 fr * * V * SUB r 10010-r- 2 fr * * V * XOR (HL) 10101110 5 fr s * * L 0 XOR (IX+d) 11011101 10101110 ----d--- 9 fr s * * L 0 XOR (IY+d) 11111101 10101110 ----d--- 9 fr s * * L 0 XOR n 11101110 ----n--- 4 fr * * L 0 XOR r 10101-r- 2 fr * * L 0 ZINTACK (interrupt) 10 - - - -

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