Rabbit 4000 Microprocessor
User's Manual
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Appendix A. Parallel Port Pins with Alternate Functions

A.1 Alternate Parallel Port Pin Outputs

Table A-1. Alternate Parallel Port A and B Pin Outputs 

Pin

Alternate Output Options

Serial Clock

I/O Mode

Slave Mode

PA[7:0]

Data

PB7

IA5
/SLVATN
PB6

IA4

PB5

IA3

PB4

IA2

PB3

IA1

PB2

IA0

PB1
SCLKA
IA7

PB0
SCLKB
IA6


Table A-2. Alternate Parallel Port C, D, and E Pin Outputs 

Pin

Alternate Output Option

0

1

2

3

16-bit Data

PC7
TXA
I7
PWM3
SCLKC

PC6
TXA
I6
PWM2
TXE

PC5
TXB
I5
PWM1
RCLKE

PC4
TXB
I4
PWM0
TCLKE

PC3
TXC
I3
TIMER C3
SCLKD

PC2
TXC
I2
TIMER C2
TXF

PC1
TXD
I1
TIMER C1
RCLKF

PC0
TXD
I0
TIMER C0
TCLKF

PD7
IA7
I7
PWM3
SCLKC
D15
PD6
TXA
I6
PWM2
TXE
D14
PD5
IA6
I5
PWM1
RCLKE
D13
PD4
TXB
I4
PWM0
TCLKE
D12
PD3
IA7
I3
TIMER C3
SCLKD
D11
PD2
SCLKC1.
I2
TIMER C2
TXF
D10
PD1
IA6
I1
TIMER C1
RCLKF
D9
PD0
SCLKD2.
I0
TIMER C0
TCLKF
D8
PE7
I7
/ACT
PWM3
SCLKC

PE6
I6

PWM2
TXE

PE5
I5
/LINK
PWM1
RCLKE

PE4
I4
/A0
PWM0
TCLKE

PE3
I3
A23
TIMER C3
SCLKD

PE2
I2
A22
TIMER C2
TXF

PE1
I1
A21
TIMER C1
RCLKF

PE0
I0
A20
TIMER C0
TCLKF

  * When Serial Port C is enabled in the clocked serial mode with an internal clock, PD2 becomes SCLKC and is not available for other use. However, all the Parallel Port D pins are used for the 16-bit data bus, and so a pin on another parallel port then has to be selected for the clock output.

* When Serial Port D is enabled in the clocked serial mode with an internal clock, PD0 becomes SCLKD and is not available for other use. However, all the Parallel Port D pins are used for the 16-bit data bus, and so a pin on another parallel port then has to be selected for the clock output


A.2 Alternate Parallel Port Pin Inputs

Table A-3. Alternate Parallel Port Pin Inputs 

Pin

Input Capture

DMA

External Interrupt

I/O Hand- shake

Network

Quad- rature Decoder

Slave Port

Serial Ports A–D

Serial Ports E–F

PA[7:0]





Data


PB7








PB6






/SCS


PB5






SA1


PB4






SA0


PB3






/SRD


PB2






/SWR


PB1







SCLKA

PB0







SCLKB

PC7
Yes






RXA
RXE
PC6









PC5
Yes






RXB
RCLKE
PC4








TCLKE
PC3
Yes






RXC
RXF
PC2









PC1
Yes






RXD
RCLKF
PC0








TCLKF
PD7
Yes






RXA
RXE
PD6









PD5
Yes






RXB
RCLKE
PD4








TCLKE
PD3
Yes
DREQ1



QRD2A

RXC
RXF
PD2

DREQ0



QRD2B

SCLKC

PD1
Yes

INT1


QRD1A

RXD
RCLKF
PD0


INT0


QRD1B

SCLKD
TCLKF
PE7
Yes
DREQ1

Yes

QRD2A
/SCS
RXA
RXE
PE6

DREQ0

Yes
ECLK
QRD2B



PE5
Yes

INT1
Yes

QRD1A

RXB
RCLKE
PE4


INT0
Yes

QRD1B


TCLKE
PE3
Yes
DREQ1

Yes

QRD2A

RXC
RXF
PE2

DREQ0

Yes

QRD2B

SCLKC

PE1
Yes
INT1
Yes

QRD1A

RXD
RCLKF
PE0

INT0
Yes

QRD1B

SCLKD
TCLKF



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