<< Previous | Index | Next >> | |
|
With the Rabbit 4000 microprocessor it is possible to design systems that perform their tasks with very low power consumption. The Rabbit has several features that contribute to low power consumption. They are summarized here and explained in greater detail in the following section.
- Special chip select features minimize power consumption by external memories.
- The Rabbit core operates at 1.8 V.
- The I/O ring can operate 3.3 or 1.8 V.
- The main crystal oscillator may be divided by 2, 4, 6 or 8.
- When the main crystal oscillator is divided by 4, 6 or 8, the short chip select option is available.
- The 32 kHz oscillator may be used instead of the main oscillator; this is sleepy mode. The 32 kHz oscillator may be divided by 2, 4, 8 or 16; this is ultra sleepy mode. The self-timed chip select option is available in both sleepy and ultra sleepy modes.
Before looking at the Rabbit 4000 low-power features in greater detail, please note that some of the power consumption in an embedded system is unaffected by the clever design features of the microprocessor. As shown in the table below, the current (and thus power) consumption of a microprocessor-based system generally consists of a part that is independent of frequency and a part that depends on frequency.
Table 9-1 Factors affecting power consumption in the Rabbit 4000 microprocessor Current leakage. CMOS logic switching state.1 Special circuits (e.g. pull-up resistors). Circuits that continuously draw power.
1 Ordinary CMOS logic uses power when it is switching from one state to another. The power drawn while switching is used to charge capacitance or is used when both N and P field effect transmitters (FETs) are simultaneously on for a brief period during a transition.
9.1 Details of the Rabbit 4000 Low-Power Features
This section goes into more detail about the Rabbit 4000 low-power features.
9.1.1 Special Chip Select Features
Unlike competitive processors, the Rabbit 4000 has two special chip select features designed to minimize power consumption by external memories. This is significant because, if not handled well, external memories can easily become the dominant power consumers at low clock frequencies. Primarily because most memory chips draw substantial current at zero frequency. (When the chip select and output enable are held enabled and all other signals are held at fixed levels.)
In situations where the microprocessor is operating at slow frequencies, such as 2.048 kHz, the memory cycle is about 488 µs and the memory chip spends most of its time with the chip enable and the output enable on. The current draw during a long read cycle is not specified in most data sheets. The Hynix HY62KF08401C SRAM, according to the data sheet, typically draws 5mA/MHz when it is operating. When performing reads at 2.048 kHz, we've found that this SRAM consumes about 14 mA. At the same frequency, with the short chip select enabled, the SRAM consumes about 23 µA--a substantial reduction in power consumption.
As shown, both special chip select modes (i.e. short chip select and self-timed chip select) reduce memory current consumption since the processor spends most of its time performing reads (i.e., instruction fetches).
The self-timed chip select feature is available in sleepy and ultra sleepy mode; i.e., when the processor is running off the 32 kHz oscillator, or when the oscillator is divided by 2, 4, 8 or 16.
The short chip select feature may be used when the main oscillator is divided by 4, 6, or 8. This division can be done regardless of whether the clock doubler is on or off. Currently, interrupts must be disabled when both the short chip select feature is enabled and an I/O instruction is used. Interrupts can be disabled for a single I/O instruction by using code such as:
push ip ; save interrupt state
ipset 3 ; interrupts off
ioe ld a,(hl) ; typical I/O instruction
pop ip ; reenable interrupts
NOTE: Short chip selects and self-timed chip selects only take place during memory reads. During writes the chip selects behave normally. For a detailed description of the chip select features, please see the Rabbit 4000 Microprocessor User's Manual.
9.1.2 Reducing Clock Speed
It is important to know that the lowest speed crystal will not always give the lowest power consumption. This is because when the crystal is divided internally, the short chip select option can be used to reduce the chip select duty cycle of the flash memory or fast RAM, greatly reducing the static current consumption associated with some memories.
Some applications, such as a control loop, may require a continuous amount of computational power. Other applications, such as slow data logging or a portable test instrument, may spend long periods with low computational requirements interspersed with short periods of high computational load. At a given operating voltage, the clock speed should be reduced as much as possible to obtain the minimum power consumption that is acceptable.
9.1.3 Preferred Crystal Configuration
The preferred configuration for a Rabbit 4000 based system is to use an external crystal or resonator that has a frequency ½ the maximum internal clock frequency. The oscillator frequency can be doubled and/or divided by 2, 4, 6 or 8, giving a variety of operating speeds from the same crystal frequency. In addition, the 32.768 kHz oscillator that drives the battery-backable clock can be used as the main processor clock. To save the substantial power consumed by the fast oscillator, it can be turned off and the processor can run entirely off the 32.768 kHz oscillator at 32.768 kHz or at 32.768 kHz divided by 2, 4, 8 or 16. This mode of operation (sleepy mode) has a clock speed in the range of 2 kHz to 32 kHz, and a VDD_{core} current consumption in the range of 14 to 22 uA, depending on frequency and voltage.
9.2 To Further Decrease Power Consumption
In addition to the low-power features of the Rabbit 4000 microprocessor, other considerations can reduce power consumption by the system.
9.2.1 What To Do When There is Nothing To Do
For the very lowest power consumption the processor can execute a long string of
mul
instructions with the DE and BC registers set to zero. Few if any internal registers change during the execution of a string ofmul
zero by zero, and a memory cycle takes place only once in every 12 clocks.9.2.2 Sleepy Mode
Power consumption is dramatically decreased in sleepy mode. The VDD_{core}current consumption is often reduced to the region of 22 µA 3.3 V and 32.768 kHz. The Rabbit 4000 executes about 6 instructions per millisecond at this low clock speed. Generally, when the speed is reduced to this extent, the Rabbit will be in a tight polling loop looking for an event that will wake it up. The clock speed is increased to wake up the Rabbit.
In sleepy mode, most of the power is consumed by:
Using the flash memory SST39LF020-45-4C-WH and a self-timed 106 ns chip select, the memory consumed 22 µA at 32 kHz and 1.4 µA at 2 kHz. For a current list of supported flash, please see Technical Note 226 "Supported Flash Devices." This document is available at:
http://www.rabbit.com/docs/app_tech_notes.shtml
The supported flash devices will give approximately the same values as the flash device that was used for testing. The processor core consumes between 3 and 50 µA at 3.3 V as the frequency is throttled from 2 kHz to 32 kHz, and about 40% as much at 1.8 V. The crystal oscillator circuit consumes 17 µA at 3.3 V. This drops rapidly to about 2 µA at 1.8 V.
Additional power consumption in sleepy mode may come from a low-power reset controller which may consume about 8 µA and CMOS leakage which may consume several µA. The power consumed by CMOS leakage increases with higher temperatures.
NOTE: Periodic interrupts are automatically disabled when the processor is placed in sleepy mode.
Debug is not directly supported in sleepy modes. Please see Section 9.2.7 on page 72 for more information.9.2.3 External 32 kHz Oscillator
Unlike the Rabbit 2000, the Rabbit 4000 has no internal 32 kHz oscillator. Instead there is a clock input. The recommended external crystal oscillator circuit and the associated battery backup circuit are discussed in Technical Note 235 available on our website:
www.rabbit.com.
9.2.4 Conformal Coating of 32.768 kHz Oscillator Circuit
The 32.768 kHz oscillator circuit consumes microampere level currents. The circuit also has very high input impedance, thus making it susceptible to noise, moisture and environmental contaminants. To avoid leakage due to moisture and ionic contamination it is recommended that the oscillator circuit be conformal coated. This is simplified if all components are kept on the same side of the board as the processor. Feedthroughs that pass through the board and are connected to the oscillator circuit should be covered with solder mask that will serve as a conformal coating for the back side of the board from the processor. Please see Technical Note 303, "Conformal Coating," and Technical Note 235 "External 32.768 kHz Oscillator Circuits" on the Rabbit website for more information
www.rabbit.com/support/techNotes_whitePapers.shtml
9.2.5 Software Support for Sleepy Mode
In sleepy mode the microprocessor executes instructions too slowly to support most interrupts. Data will probably be lost if interrupt-driven communication is attempted. The serial ports can function but cannot generate standard baud rates when the system clock is running at 32.768 kHz or below.
The 48-bit battery-backable clock continues to operate without interruption.
Usually the programmer will want to reduce power consumption to a minimum for a fixed time period or until some external event takes place. On entering sleepy mode by calling
use32kHzOsc()
, the periodic interrupt is completely disabled, the system clock is switched to 32.768 kHz, and the main oscillator is powered down. The device may be run even slower by dividing the 32kHz oscillator by 2, 4, 8, or 16 with theset32kHzDivider()
call. When the 32kHz oscillator is divided, these slower modes are called ultra sleepy modes.On exiting sleepy mode by calling
useMainOsc()
, the main oscillator is powered up, a time delay is inserted to be sure that it has resumed regular oscillation, and then the system clock is switched back to the main oscillator. At this point the periodic interrupt is reenabled.While in sleepy mode the user may call
updateTimers()
periodically to keep Dynamic C time variables updated. These time variables keep track of seconds and milliseconds and are normally used by Dynamic C routines to measure time intervals or to wait for a certain time or date.updateTimers()
reads the real-time clock and then computes new values for the Dynamic C time variables. The normal method of updating these variables is the periodic interrupt that takes place 2048 times per second.
NOTE: In ultra sleepy modes, calling updateTimers()
is not recommended.Functions are provided to power down the Realtek Ethernet chip as well. By calling the
pd_powerup()
andpd_powerdown()
functions, the Realtek chip can be placed in and awakened from its own powerdown mode. Note that no TCP/IP or Ethernet functions should be called while the Realtek is powered down.9.2.6 Baud Rates in Sleepy Mode
The available baud rates in sleepy mode are 1024, 1024/2, 1024/3, 1024/4, etc. Baud rate mismatches of up to 5% may be tolerated. The baud rate 113.77 is available as 1024/9 and may be useful for communicating with other systems operating at 110 bps--a 3.4% mismatch. In addition, the standard PC compatible UART 16450 with a baud rate divider of 113 generates a baud rate of 1019 bps, a 0.5% mismatch with 1024 bps. If there is a large baud rate mismatch, the serial port can usually detect that a character has been sent to it, but can not read the exact character.
9.2.7 Debugging in Sleepy Mode
Debugging is not supported in sleepy modes. However, running with no polling (Alt-F9) will avoid the loss of target communications when execution enters sections of code using sleepy mode, and debug communications will resume when the normal operation mode is reenabled.
Rabbit 4000 Designer's Handbook |
<< Previous | Index | Next>> | rabbit.com |