naspi_extern\master: SPI Master External Peripheral Example Application

Overview
--------
This application shows how to use the simple SPI Master API and
demonstrates the communication between SPI Master and SPI Slave.

The application is written for SPI Master to communicate to SPI Slave. SPI Slave 
resides externally (different board). 

When SPI Master initates a transfer, SPI slave may or may not receive or process
the data. Therefore, this application is designed to use "string pattern" embedded in 
the transfer data to assure the data is received between the master and slave.

This application uses opcode to talk/access the spi slave.

This application starts transfer from length of 1 byte to 256 bytes (APP_SPI_MASTER_RAW_DATA_SIZE) before
sending "string pattern" to SPI Slave. This application expects to receive data 0xEE for the first 
transfer of 1 byte data, 0xDDDD for the second transfer of 2 bytes data, 0xCCCCCC for the third transfer
of 3 bytes data,...etc. 

Once the master finishes 256 transfers, it starts sending "string pattern" to the slave and waits for
the slave to respond with "string pattern". This application will start testing using the opcodes.
                                                                                                  

The opcodes are defined in spi_conf.h:

APP_SPI_DEVICE_OPCODE_WREN    write enable      
APP_SPI_DEVICE_OPCODE_WRDI    write disable
APP_SPI_DEVICE_OPCODE_RDSR    read device status register
APP_SPI_DEVICE_OPCODE_WRSR    write device status register
APP_SPI_DEVICE_OPCODE_READ    read 32 bytes of memory
APP_SPI_DEVICE_OPCODE_WRITE   write 32 bytes of memory

Each opcode requires "string pattern"

    |string pattern|APP_SPI_DEVICE_OPCODE_WREN|
    |string pattern|APP_SPI_DEVICE_OPCODE_WRDI|
    |string pattern|APP_SPI_DEVICE_OPCODE_RDSR|
    |string pattern|APP_SPI_DEVICE_OPCODE_WRSR|status register value|
    |string pattern|APP_SPI_DEVICE_OPCODE_READ|offset location 4 bytes|
    |string pattern|APP_SPI_DEVICE_OPCODE_WRITE|offset location 4 bytes|32 bytes data|

All configuration is defined in spi_conf.h.

The length for each transfer must be 64 (APP_SPI_DEVICE_PACKET_SIZE) bytes of length.

The data will be compared after a APP_SPI_DEVICE_OPCODE_WRITE and APP_SPI_DEVICE_OPCODE_READ opcodes.

Note: SPI Slave must start before SPI Master.

Supported Platforms and Processors
----------------------------------

This application uses the SPI Master API, thus requires the SPI Master 
hardware available on each platform.  

All supported platforms are listed in spi_conf.h
With modification, this application can be ported to other Development board that support SPI Master

Features and APIs being demonstrated
------------------------------------
    SPI Master
    - NASpiRegisterDevice()
    - NASpiReadWrite()
    - NASpiDeregisterDevice()

Required external equipment and setup
-------------------------------------

    1. Find out the GPIO pin for SPI Slave RX, TX, CLK, and CS.
       Refer to the hardware manual for more information about GPIO pins for platform you are using.
    2. Connect RX to SPI Slave TX.
       Connect TX to SPI Slave RX.
       Connect CLK to SPI Slave CLK
       Connect CS to SPI Slave CS.
       Connect GND to GND on SPI Slave's board
       See below for specific pins for each platform.

       If PLATFORM is not one of the following platforms, specify GPIO pin settings in root.c
       and comment out the error message in Makefile.

-------------------------------------
    For Connectme 9210 platform:
        1. The P3 is used to connect SPI Slave and the following GPIO pins are
           used. 

            P3[pin 8]  GPIO 7 TX
            P3[pin 7]  GPIO 3 RX
            P3[pin 9]  GPIO 5 CLK
            P3[pin 13] GPIO 0 EN
            P3[pin 16] GND

            If different GPIO pins are used, change it in spi_conf.h
            #define APP_SPI_MASTER_GPIO_CS      0
            #define APP_SPI_MASTER_GPIO_CLK     5
            #define APP_SPI_MASTER_GPIO_RXD     3
            #define APP_SPI_MASTER_GPIO_TXD     7


        2. Set all switches on SW3 to GPIO selection.

        3. Serial Port A must be disabled (place a jumper on P5 to disable 232).
           Set BSP_STDIO_PORT & BSP_DIALOG_PORT to /com/2 in bsp_sys.h.
           P2 Serial Port 2 will be used for serial output.
           


    For ConnectCore 9P 9215 platform:
        1. The X8 (SPI header) is used to connect SPI Slave.
           X8[pin 1] +3.3v
           X8[pin 2] GPIO 7 TX
           X8[pin 3] GPIO 3 RX
           X8[pin 4] GPIO 5 CLK
           X8[pin 5] GPIO 0 EN
           X8[pin 6] GND

           If different GPIO pins are used, change it in spi_conf.h
           #define APP_SPI_MASTER_GPIO_CS      0
           #define APP_SPI_MASTER_GPIO_CLK     5
           #define APP_SPI_MASTER_GPIO_RXD     3
           #define APP_SPI_MASTER_GPIO_TXD     7
            
    For ConnectCore 9C or ConnectCore Wi-9C platform:
        1. Set appropriate serial port to BSP_SERIAL_SPI_DRIVER in bsp_serial.h and
           rebuild the BSP.
           Make sure the GPIO Mux for the serial port is not set to BSP_GPIO_MUX_INTERNAL_USE_ONLY.
           i.e. #define BSP_SERIAL_PORT_2 BSP_SERIAL_SPI_DRIVER.
                #define BSP_GPIO_MUX_SERIAL_B BSP_GPIO_MUX_SERIAL_SPI_APP 

        2. The P7 (SPI header) is Port B (BSP_SERIAL_PORT_2 and BSP_GPIO_MUX_SERIAL_B) and is used to connect SPI Slave.
           P7[pin 1] +3.3v
           P7[pin 2] GPIO 0 TX_B
           P7[pin 3] GPIO 1 RX_B
           P7[pin 4] GPIO 6 CLK
           P7[pin 5] GPIO 7 EN
           P7[pin 6] GND

           If different port is used, update APP_SPI_MASTER_PORT and GPIO pins in spi_conf.h
            #define APP_SPI_MASTER_PORT         PORTB
            #define APP_SPI_MASTER_GPIO_CS  7
            #define APP_SPI_MASTER_GPIO_CLK 6
            

    For NS7520 Rev A platform:
        1. Set appropriate serial port to BSP_SERIAL_SPI_DRIVER in bsp_serial.h and 
           rebuild the BSP.
           Make sure the GPIO Mux for the serial port is not set to BSP_GPIO_MUX_INTERNAL_USE_ONLY.
           i.e. #define BSP_SERIAL_PORT_2 BSP_SERIAL_SPI_SLAVE_DRIVER.
                #define BSP_GPIO_MUX_SERIAL_B BSP_GPIO_MUX_SERIAL_SPI_MASTER 

        2. This application is using PORT B as SPI Master port.
           Serial Port B must be disabled (place a jumper on P6).
     
           The J11 is used to connect SPI Slave.
               J11[pin 1] +3.3v
               J11[pin 2] GPIO 7 TX
               J11[pin 3] GPIO 3 RX
               J11[pin 4] GPIO 5 CLK
               J11[pin 5] GPIO 0 EN
               J11[pin 6] GND
            
           If different port is used, update APP_SPI_MASTER_PORT and GPIO pins in spi_conf.h
            #define APP_SPI_MASTER_PORT         PORTB
            #define APP_SPI_MASTER_GPIO_CS      0
            #define APP_SPI_MASTER_GPIO_CLK     4
                

The application uses the following files located in the
netos\src\linkerScripts directory.  These files are generated
when the BSP is built.

bootldr.dat     bootloader configuration file used to generate the
                file image.bin.  It controls the information placed
                in the bootloader header of the image.

image.ldr       GNU linker script used to build an image that can
                be debugged and used with the bootloader.
                
customize.ldr   Customizable GNU linker script
