Release Notes for MAJIC Series
August 31, 2006
Description:
This file documents the most important changes and improvements in the current and recent firmware versions for the MAJIC Series of Intelligent Debug Probes.
Notes:
Please refer to the MAJIC Update Procedure application note for instructions on installing a MAJIC firmware update from a Windows PC, or Using a MAJIC® Probe With A Linux PC if you are using a Linux PC.


v3.8.8, August 2006 — EDT 2.3b/NS SP1_NS
  • Fixed bug introduced in 3.8.7 causing MAJIC to become unresponsive when the debugger attempts to read or write an invalid memory location.
 
v3.8.7, July 2006 — EDT 2.3b/NS
  • Fixed write-back cache management.
 
v3.7.0, February 2006 — EDT 2.3a, EDT 2.3b
  • Added support for Broadcom BCM3349, BCM4785, BCM5352, BCM5836, BCM7038, BCM7312, BCM7320, as well as newer BCM4704 revisions.
  • Added support for Broadcom BCM6550 — Note that this CPU requires a special firmware build. Visit SupportNet for additional information before using a MAJIC probe with this processor.
  • Added support for the cnMIPS core used in the Cavium OCTEON processor.
  • Added support for IXP465, IXP2350.
  • Added support for "data coherency" mode in IXP425.
  • Added support for Marvell MRV02 processor. Note that a special firmware build is recommended for this processor. Visit SupportNet for additional information.
  • Improved support for using MAJIC and the debugger as a Virtual Terminal.
  • Fixed the bug that prevented a disabled hardware breakpoint from being reenabled.
  • Added support for accessing all of the MIPS64 virtual memory space while in debug mode, regardless of user's Status Register settings.
  • Fixed a bug in MIPS64 program counter management when execution stops outside of the MIPS32 compatibility areas.
  • Fixed a bug in MIPS64 block mode memory transfers that are not within the MIPS32 compatibility areas.
  • Improved download performance for MIPS processor types which do NOT provide the EJTAG DMA channel (MTI 4K, 4KE, 24K, 5K cores).
  • Fixed a number of bugs in single stepping through MIPS16 code.
 
v3.6.4, March 2005
  • Added support for BCM5352.
  • Improved download performance for MTI and IDT processors by approximately 2x.
  • Fixed a bug in MIPS32 cache management that occurs if ICache or DCache exceeds 32k.
  • Added code to recover from unexpected JTAG reset events during program execution on ARM based boards.
  • Fixed a bug that prevented the MAJIC/Plus trace control PLD update from succeeding.
 
v3.6.2, February 2005 — EDT 2.2a
  • Added support for the ARM968ES processor core, including support for the "reduced debug mode" synthesis option.
  • Added support for MTI 24Kc and 24Kf processor cores.
  • Added support for directly accessing the cache memory in MTI 4K, 4KE, and 24K series processor cores. The cache tags were already accessible via ICTn and DCTn pseudo registers, but now cache memory can be accessed via :I and :D memory spaces. Also added the dc.cmd file to display all cache and tag information relative to a given address. Run the dc.cmd file without parameters to see a usage prompt.
  • Fixed a bug in 4KEx cache management.
  • Improved cache management for the ARM9 series of processor cores.
  • Added support for using MAJIC and the debugger as a virtual terminal. If you are using Ethernet for your host debugger connection, then you can connect the MAJIC serial port to your target board's serial port, so messages output by your target will be displayed in the debugger. See the new ice_virtual_term option for additional information. See the MAJIC User Manual for details on the serial port wiring.
  • Added On-Go and On-Reset commands to compliment the On-Stop and Idle-Mode commands that were added in v3.3.2. See comments embedded in bin/cmd_desc.cmd for additional information.
  • Fixed a bug in ice_trigger_out=run_sync mode. The trigger output was not being negated for the user break case.
  • Added a manual trigger mode so the state of the trigger output can be set, and the state of trigger input can be tested, from the command line or a command file. Use EB MAJIC_TRIGGERS to set the trigger output, or DB MAJIC_TRIGGERS to see the trigger input.
 
v3.5.2, November 2004
  • Significant improvement in download performance (30% to 60% for MIPS, 2x to 3x for ARM).
  • Improved reset management for ARM. Added a new option (ice_reset_cp15_cntrl) for controlling H/W strapped CP15_CNTRL bits.
  • Fixed a number of problems with ARM9 cache and MMU management. Replaced the now obsolete CP_Code_Address option with new Ice_Mem_Block option.
  • Fixed a bug that could temporarily leave breakpoints in memory after certain single step operations.
 
v3.4.5, April 2004 — EDT 2.1c
  • Added support for Intel XScale® PXA270.
  • Added support for Faraday FA526 core.
  • Added support for Broadcom BCM4712.
  • Implemented work around for silicon erratum in user break request on BCM4704, BCM4712, BCM5365, BCM5834.
  • Implemented work around for different silicon erratum in user break request on BCM6348/A1.
  • Added cache management for ARM940T, if cp_code_address option is set to non-zero value. Use "DOV CCA" command for more information.
  • Fixed a bug in LX4280 support which could cause the CPU to lock up if DMA mode is selected while a jammed store instruction is still pending in the pipeline.
  • Made multi-session debugging optional in MAJICMX and MAJICPLUS via new ice_multi_session option, with default mode being off. Now a new debug session can be started in a single processor environment by killing the previous session (after asking if you really mean to). This means it is no longer necessary to reboot the probe if your debugger terminates without properly disconnecting (which was always the case with the base model MAJIC probe).
  • Fixed a bug in ARM9 vector_catch support which prevented vectors from 0x10 through 0x1C (and their high equivalents) from being caught.
  • The correct halt reason is now reported for vector catch on Intel XScale® cores (the MAJIC probe used to report hardware breakpoint if an Intel XScale® core stopped due to a caught exception).
  • The MAJIC probe now validates coprocessor register requests on Intel XScale® cores, and refuses to access non-existant coprocessor registers.
  • Fixed partial word data breakpoint (watchpoint) support on ARM cores.
  • Fixed a bug in MAJICPLUS trace acquisition when trace_trigger_action=stop which caused the trace buffer to be cleared when execution resumed after a breakpoint. The trace buffer is only supposed to be cleared if it had been displayed.
  • MAJIC firmware now suspends Idle-Mode command operations when target is depowered.
 
v3.4.1, December 2003 — EDT 2.1b
  • Added support for MAJIC/Plus/II model.
  • Added support for MAJICO model.
  • Fixed a problem with tracing across semi-hosting calls with ARM/ETM.
  • Fixed a problem with break detection on some ARM966 targets.
 
v3.3.5, December 2003
  • Added support for IOP80331
  • Fixed memory access problems with ARM94X processors due to a bug that incorrectly enabled MMU management functionality.
  • Fixed a problem with memory transfer requests that cross MMU page boundaries.
  • Fixed support for setting the Semi_Hosting_Vector to an address other than 8.
  • Fixed some problems with cache management on ARM92X and ARM94X processors.
  • Fixed a bug that prevented the Ice_Trigger_Input=Break mode from stopping execution on the trigger event.
  • No longer restores original instruction at a software breakpoint location if the breakpoint opcode was overwritten during program execution.
  • Fixed a bug in RTCK support when Ice_Jtag_Use_Trst=On and Ice_Jtag_Use_Rtclk=On.
 
v3.3.3, October 2003 — EDT 2.1a
  • Added full support for: ARM926EJS, BCM7315, BCM4704, BCM5365, BCM5834, IXC1100, IXP420, IXP421, IXP422, IXP2400, IXP2800, IXP2850, PXA255, PXA260, PXA261, PXA262, and PXA263. Also added limited support for MTI4KE series, BCM4712, BCM6348, BCM7115.
  • Added support for user defined On-Stop and Idle-Mode operations. This allows a sequence of memory or peripheral access to be performed once when execution stops, or repeatedly while stopped. This may be used, for example, to disable or periodically reset a watchdog timer.
  • Moved the software for processing MIPS/PCTrace, ARM/ETM, and XScale internal trace from the MAJIC firmware to the debugger side (EDB, MON, MDI). This allows non-intrusive trace support for PCTrace and ETM, and minimally intrusive trace support for XScale.
  • Improved Reset Target (RT) command for ARM, to prevent any code execution after reset, IF nSRESET does not propagate to nTRST, AND Trgt_Resets_Jtag=No.
  • Improved the MMU_DUMP utility for ARM and XScale.
  • Fixed the problem in stepping through sequential code located in the exception table on XScale.
  • Fixed a bug in user-break support for ARM7.
  • Fixed a bug in the ARM Semi-Hosting SYS_WRITE0 function.
  • Fixed run LED in non-intrusive connect and disconnect cases.
  • Fixed a bug where MAJIC may lock-up upon debugger disconnect if Ice_Jtag_Clock_Freq=0.
 
v3.3.1 - v3.3.2
Various application specific engineering updates.
 
v3.2.6, May 2003
Improved MAJIC/II serial port driver.
 
v3.2.5, April 2003
  • Initial MAJIC/II hardware support.
  • Added MMU_XLATE and MMU_DUMP support for ARM processors (previously has supported XScale only).
  • Substantial improvement in download performance for XScale.
  • Added support for ARM Adaptive Clocking when IJCF=0.
 
v3.3.0, March 2003
This was a special build that was equivalent to v3.2.3, but with new MIPS/PCTrace processing software. In this build, the PCTrace processing software was moved from the MAJIC firmware to the debugger side (EDB, MON, MDI).
 
v3.2.3, March 2003 — EDT 2.0b
  • Added support for Broadcom BCM1101, BCM47xx, BCM6345, IDT RC32438, Xilleon X220, and X225 processors.
  • Added support for "Hot-Debug" with the Intel XScale microarchitecture.
  • Added support for accessing extended coprocessor registers with the Intel XScale microarchitecture.
  • Added support for ARM SemiHosting with High Vectors. Also fixed a bug in seek function in semihosting support.
  • Added support for MMU dump and MMU translate functions for ARM.
  • Fixed a bug in debug session management which intermittently crashed MAJIC if the debugger was quit while hardware breakpoints were still set.
  • Improved error handling for commands which fail while running in concurrent debug mode.
  • Implemented several optimizations in the ARM support modules.
  • Fixed a bug in the ethernet connection process that was triggered by some computers duplicating the EPI CONNECT packet. MAJIC will now detect and ignore the redundant packet.
  • Fixed several bugs in MIPS16 and Thumb support.
  • Fixed a bug specific to Multi-TAP XScale targets.
  • Fixed bugs in MC table on processors with more than 32 physical address bits. Also fixed virtual address translation bug specific to MIPS64 processors.
  • Minor enhancements in PCTrace support: following an interrupted TPC stream, and improved support for Lexra vectored interrupts).
 
v3.2.1, November 2002 — EDT 2.0a
  • Major overhaul of MAJIC User Manual, especially the chapter on configuration. Also added thorough documentation of MON command language.
  • Added support for PR1910, PXA250, PXA210, 80321, IXP425, and MTI5Kc.
  • Added support for write-back cache for most ARM9 variants (but not ARM940T yet). Was already supported for MIPS and XScale, but fixed a bug in Lexra DCache management.
  • Significantly improved ethernet reliability.
  • Added support for configurable bus width in the MC table. Limits the maximum datum size used by MAJIC for narrow memory regions which do not support byte gathering or byte scattering in hardware. Also sets the datum size used when partial word access is disabled (PWD mode).
  • Added support for read-only memory in the MC table to prevent MAJIC from writing to non writable memory areas. Breakpoints set in areas marked as read-only are automatically converted to hardware breakpoints.
  • Added support for user defined JTAG initialization.
  • Added the Vector_Load_Low and Vector_Load_High options, and user defined vector tables to MAJIC/XScale. See Using MAJIC with the Intel® XScale™ Micro-Architecture application note for information on vector management.
  • Added support for XScale MMU, and for displaying the virtual to physical memory mapping specified in the memory based page tables. Added PID to trace addresses—logic assumes that the current PID was valid for the whole trace buffer, which may not always be true, but there is no way to tell if/when it changed.
  • Added support for directly accessing physical memory to MAJIC/ARM (was already supported for MIPS).
  • Added support for ADS Real Monitor, and underlying support for ARM DCC (Debug Communication Channel). See the MAJIC User's Manual for details on setting up and using Real Monitor with MAJIC.
  • Added support for non intrusive debug print channel for MAJIC/MIPS.
  • Replaced the Freestanding_Mode option in MAJIC/MIPS with Semi_Hosting_Enabled option.
  • Added user interface control for ARM's RTCLK signal instead of automatic selection based on CPU type. This allows support for multi processor systems where one CPU implements RTCLK but the other does not.
  • Made several improvements to non-intrusive connection mode.
  • Fixed several bugs in stepping through Thumb code, and certain cases of JR in MIPS16 code.
  • Added support for AP-ARM38 Active Probes (requires version 6 trace control PLD, included in this release).
  • Fixed a bug in ETM support which caused trace acquisition to start after program execution started. Now it is possible to trace start of execution. Also made several improvements in ETM trace data processing.
  • Added support for tracing Thumb (only) code on XScale.
  • Fixed several bugs in MIPS16 tracing across certain jump and branch instructions. Also changed the Trace_MIPS16 option to assume jump target is MIPS16 code if MAJIC cannot determine whether it is MIPS16 or MIPS32 code, instead of dropping the thread at such points and emitting ???? until the next jump.
  • Fixed bugs in memory move and memory fill functions.
 
Task Savvy project file: C:\dcb\majic.FW\ice\majic\relnotes.ts