15. EMI Control

EMI or electromagnetic interference from unintentional radiation is of concern to the microprocessor system designer.

One concern is passing the tests sometimes required by the U.S. Federal Communications Commission (FCC) or by the European EMC Directive. For example, in the U.S. the FCC requires that computing devices intended for use in the home or in office environments (but not industrial or medical environments) not have unintentional electromagnetic radiation above certain limits of field strength that depend on frequency and whether the device is intended for home or office use. This is verified by measuring radiation from the device at a test site. The device under test (DUT) is operated in a typical fashion with a typical mechanical and electrical configuration while the electromagnetic radiation is measured by a calibrated antenna located either 3 or 10 m from the device. The output of the antenna is connected to a spectrum analyzer. For the purposes of the test, the spectral power is measured by using a filter with a bandwidth of 120 kHz. The peak power is measured by using a "quasi peak" detector in the spectrum analyzer. The quasi peak detector has a charge time constant of 1 ms and a discharge time constant of 550 ms. In this manner the peak radiated signal strength is measured. The tests required by the FCC and the EC are practically identical.

The Rabbit 3000 has important features that aid in the control if EMI.

• The power supply for the processor core is on separate pins from the power supply for the I/O buffers associated with the processor and various peripheral devices.

• A spectrum spreader in the clock circuit can be enabled to spread the spectrum of the clock by varying the clock frequency in a regular pattern.

• The built in clock doubler allows the external oscillator circuitry to operate at 1/2 the ultimate clock frequency.

• In most cases it is not necessary to route the system clock outside the package, although a pin is provided for this purpose in the unusual circumstances where it might be necessary. The high speed clock on PC board traces is a major cause of EMI.

If all the EMI suppression features of the Rabbit 3000 are properly utilized and low EMI design techniques are used on the printed circuit board, system EMI will likely be reduced to a very low level, probably much lower than is necessary to pass government tests.

15.1 Power Supply Connections and Board Layout

The Rabbit die and package are schematically shown in Figure 15-1 below. The die is divided into two power supply regions, the core and I/O ring. (A third power-supply region, the battery-backable region exists but is not important for EMI.) The core is provided power by means of 8 pins, 4 of which are grounds and 4 of which provide nominal 3.3 V power. The I/O ring has 8 ground pins and 7 power pins. The package pins are connected to bonding pads on the silicon die by thin bond wires. The connections consisting of the bond wires and the package lead frame exhibit an inductance of about 5 nH.

Figure 15-1. Division of Rabbit 3000 Die and Package

The core contains fast logic and switches large currents synchronous with the clock edges. The core generates considerable high-frequency noise, which can pass outside the package via the core power and ground pins. The I/O ring contains the buffers that drive the package pins. The buffers typically operate at lower frequencies with slower rise times than the core logic. Noise on the power supply rails in the I/O ring will be passed through the buffers and appear on the output pins.

In a low-EMI design, there should be a power and ground plane in the PC board. The power and ground plane distribute power and ground to all the components on the PC board, including drivers that drive wires exiting from the PC board. It is important to minimize the high-frequency noise on the power and ground distribution to prevent EMI. The basic method of doing this is to filter the core power pins to block noise from reaching the PC board. The I/O ring is then connected to the PC power distribution with a low-inductance connection. Noise on the I/O ring power supply will be communicated to every output pin on the package, so it is important to minimize the level of I/O ring supply noise.

It is suggested that the power pins for the core and the I/O supply be connected to the supply planes and decoupling capacitors in a different fashion as shown in Figure 15-2 below. By placing the decoupling capacitor for the core before the connection is made to the power and ground planes, noise from the core propagates less into the power and ground planes. Using a small, 1 nF, decoupling capacitor gives better high-frequency response, up to the 100 MHz region, than a larger 10 or 100 nF capacitor would. 10 nF and 100 nF capacitors can be distributed between the ground and power planes to provide bulk decoupling for the power supply.

Figure 15-2. Recommended Core and I/O Power-Supply Connections

Noise on the core power rails can only exit the package via the core power-supply pins. It will not be transmitted through the buffers in the I/O ring because these buffers are saturated when in a steady on or off state. The frequency components of the noise that are most troublesome for creating unintentional radiation are generally frequencies in the range of 100-300 MHz. Lower frequencies are more easily attenuated by decoupling capacitors and do not radiate well because the effective antennas are too small relative to the wavelength. Higher frequencies are attenuated by the finite rise time of the edges, and government emission limits are more relaxed at the higher frequencies. A 1 nF surface-mount capacitor has its minimum impedance of about 1 W at around 200 MHz. A larger capacitor, such as 10 nF, will be less effective in the critical frequency range. At 200 MHz the impedance of the bond wires and lead frame path is about 5 W.

A more extreme approach would be to place several decoupling capacitors in parallel or use special low inductance capacitors. In addition, a series ferrite can be placed between VCC and the decoupling capacitor at each pin. However, these measures are probably overkill for the Rabbit 3000, especially when the spectrum spreader is enabled.

15.1.1 Noise Generated in the I/O Ring

Any noise on the I/O ring power rails will propagate to all output pins, thus spreading potential EMI. By keeping core noise off the power planes, as described above, the amount of noise fed into the I/O ring power pins can be minimized. However noise is also generated by activity of the buffers in the I/O ring. The worst potential offender the buffer that optionally drives the clock (CLK, pin 2). This output may be disabled or set to output 1/2 the clock frequency or the full clock frequency. For EMI it is best to disable this pin. If it must be enabled it is much better to drive 1/2 the clock frequency rather than the full frequency. If the clock does exit the package then loading on the buffer should be minimized to reduce the noise referred to the I/O ring power rails. This can be done by placing a series resistor in the clock line near the package or at least minimizing the load capactance. This will reduce the current switched at the clock frequency or at 1/2 the clock frequency. Of course a series resistor will slow rise time, possibly to an unacceptable extent.

The next item to consider is the oscillator buffer. This buffer will generally operate at 1/2 the clock frequency, assuming that the clock doubler is used. Since the oscillator buffer has fairly high impedance and slow rise times, the power supply noise should be minimal. Be sure to decouple the power pins adjacent to the oscillator buffer pins. The current loop made by the external components of the oscillator circuit should be laid out with minimal area and be adjacent to a power plane. The series resistor in the oscillator circuit should be as large as can be tolerated and still have reliable oscillator operation.

Of the remaining output lines address line zero may switch at up to 1/2 the clock frequency although the periodicity is broken up by wait states and instructions that do not perform 2 clock memory accesses. To minimize EMI generated by this line keep the capacitance driven to a minimum, avoid loops and make sure the line runs over a power plane or is buried between power planes. Consider not using address zero to address I/O devices other than memory, so as to reduce the capacitance driven. Generally address line one (A1) will generate 6 dB less EMI because it operates at 1/2 the frequency.

15.2 Using the Clock Spectrum Spreader

The spectrum spreader is very powerful for reducing EMI because it will reduce all sources of EMI above 100 MHz that are related to the clock by about 15 dB. This is a very large reduction since it is common to struggle to reduce EMI by 5 dB in order to pass government tests.

Figure 15-3. Peak Spectral Amplitude Reduction from Spectrum Spreader

The spectrum spreader modulates the clock so as to spread out the spectrum of the clock and its harmonics. Since the government tests use a 120 kHz bandwidth to measure EMI, spreading the energy of a given harmonic over a wider bandwidth will decrease the amount of EMI measured for a given harmonic. The spectrum spreader not only reduces the EMI measured in government tests, but it will also often reduce the interference created for radio and television reception.

The spectrum spreader has three settings under software control (see Table 15-1 and Table 15-2): off, standard spreading and strong spreading.

Two registers control the clock spectrum spreader. These registers must be loaded in a specific manner with proper time delays. GCM0R is only read by the spectrum spreader at the moment when the spectrum spreader is enabled by storing 080h in GCM1R. If GCM1R is cleared (when disabling the spectrum spreader), there is up to a 500-clock delay before the spectrum spreader is actually disabled. The proper procedure is to clear GCM1R, wait for 500 clocks, set GCM0R, and then enable the spreader by storing 080h in GCM1R.

Table 15-1. Spread Spectrum Enable/Disable Register

Global Clock Modulator 0 Register (GCM0R) (Address = 0x0A)
Bit(s)	Value	Description
7	0	Enable normal spectrum spreading.
	1	Enable strong spectrum spreading.
6:0		These bits are reserved.

Table 15-2. Spread Spectrum Mode Select

Global Clock Modulator 1 Register (GCM1R) (Address = 0x0B)
Bit(s)	Value	Description
7	0	Disable the spectrum spreader.
	1	Enable the spectrum spreader.
6:0		These bits are reserved.

When the spectrum spreader is engaged, the frequency is modulated, and individual clock cycles may be shortened or lengthened by an amount that depends on whether the clock doubler is engaged and whether the spectrum spreader is set to the normal or strong setting. The frequency modulation amplitude and the change in clock cycle length is greater at lower voltages or higher temperatures since it is sensitive to process parameters. The spectrum spreader also introduces a time offset in the system clock edge and an equal offset in edges generated relative to the system clock. A feedback system limits the worst case time error of any signal edge derived from the system clock to plus or minus 20 ns for the normal setting and plus or minus 40 ns for the strong setting at 3.3 V. The maximum time offset is inversely proportional to operating voltage. The time error will not usually interfere with communications channels, except perhaps at the extreme upper data rates. More details on dealing with the clock variation introduced are available elsewhere (see Chapter 16, "AC Timing Specifications).

If the input oscillator frequency is 4 MHz or less the spectrum spreader modulation of frequency will enter the audio range of 20 kHz or less and may generate an audible whistle in FM stations. For this reason it may be desirable to disable the spreader for low speed oscillators (where it is probably unnecessary anyway). However, in practical cases the whistle may not be audible due to the very low level of the interference from a system with low oscillator frequency and the spectrum spreader engaged. Each halving of clock frequency reduces the amplitude of the harmonics at a given frequency by 6 dB or more.

The effect of pure harmonic noise on an FM station is to either completely block out a station near the harmonic frequency or to disturb reception of that station. If the spectrum spreader is engaged then interference will be spread across the band but will generally be so low as to be undetectable, except perhaps for extremely weak stations. The effect of a pure harmonic on TV reception is to create a herringbone pattern created by a harmonic falling within the station's band. If the spreader is engaged the pattern will disappear unless the station is very weak, in which case the interference will be seen as noise distributed over the screen.