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A. Load Immediate Data
- LD dd,mn
- LD IX,mn
- LD IY,mn
- LD r,n
B. Load and Store to an Immediate Address
- LD (mn),A
- LD (mn),HL
- LD (mn),IX
- LD (mn),IY
- LD (mn),ss
- LD A,(mn)
- LD dd,(mn)
- LD HL,(mn)
- LD IX,(mn)
- LD IY,(mn)
C. 8-bit Indexed Load and Store
- LD (BC),A
- LD (DE),A
- LD (HL),n
- LD (HL),r
- LD (IX+d),n
- LD (IX+d),r
- LD (IY+d),n
- LD (IY+d),r
- LD A,(BC)
- LD A,(DE)
- LD r,(HL)
- LD r,(IX+d)
- LD r,(IY+d)
D. 16-bit Indexed Load and Store
- LD (HL+d),HL
- LD (IX+d),HL
- LD (IY+d),HL
- LD (SP+n),HL
- LD (SP+n),IX
- LD (SP+n),IY
- LD HL,(HL+d)
- LD HL,(IX+d)
- LD HL,(IY+d)
- LD HL,(SP+n)
- LD IX,(SP+n)
- LD IY,(SP+n)
E. 16-bit Load and Store to 20-bit Address
- LDP (HL),HL
- LDP (IX),HL
- LDP (IY),HL
- LDP (mn),HL
- LDP (mn),IX
- LDP (mn),IY
- LDP HL,(HL)
- LDP HL,(IX)
- LDP HL,(IY)
- LDP HL,(mn)
- LDP IX,(mn)
- LDP IY,(mn)
F. Register to Register Moves
- LD A,EIR
- LD A,IIR
- LD A,XPC
- LD dd',BC
- LD dd',DE
- LD EIR,A
- LD HL,IX
- LD HL,IY
- LD IIR,A
- LD IX,HL
- LD IY,HL
- LD r,g
- LD SP,HL
- LD SP,IX
- LD SP,IY
- LD XPC,A
G. Exchange
- EX (SP),HL
- EX (SP),IX
- EX (SP),IY
- EX AF,AF'
- EX DE,HL
- EX DE',HL
- EXX
H. Stack Manipulation
- POP IP
- POP IX
- POP IY
- POP zz
- PUSH IP
- PUSH IX
- PUSH IY
- PUSH zz
I. 16-bit Arithmetic, Logical, and Rotate
- ADC HL,ss
- ADD HL,ss
- ADD IX,xx
- ADD IY,yy
- ADD SP,d
- AND HL,DE
- AND IX,DE
- AND IY,DE
- BOOL HL
- BOOL IX
- BOOL IY
- DEC IX
- DEC IY
- DEC ss
- INC IX
- INC IY
- INC ss
- MUL
- NEG
- OR HL,DE
- OR IX,DE
- OR IY,DE
- RL DE
- RR DE
- RR HL
- RR IX
- RR IY
- SBC HL,ss
J. 8-bit Arithmetic and Logical
- ADC A,(HL)
- ADC A,(IX+d)
- ADC A,(IY+d)
- ADC A,n
- ADC A,r
- ADD A,(HL)
- ADD A,(IX+d)
- ADD A,(IY+d)
- ADD A,n
- ADD A,r
- AND (HL)
- AND (IX+d)
- AND (IY+d)
- AND r
- CP (HL)
- CP (IX+d)
- CP (IY+d)
- CP n
- CP r
- NEG
- OR (HL)
- OR (IX+d)
- OR (IY+d)
- OR n
- OR r
- SBC (IX+d)
- SBC (IY+d)
- SBC A,(HL)
- SBC A,n
- SBC A,r
- SUB (HL)
- SUB (IX+d)
- SUB (IY+d)
- SUB n
- SUB r
- XOR (HL)
- XOR (IX+d)
- XOR (IY+d)
- XOR n
- XOR r
K. 8-bit Bit Set, Reset, and Test
- BIT b,(HL)
- BIT b,(IX+d)
- BIT b,(IY+d)
- BIT b,r
- RES b,(HL)
- RES b,(IX+d)
- RES b,(IY+d)
- RES b,r
- SET b,(HL)
- SET b,(IX+d)
- SET b,(IY+d)
- SET b,r
L. 8-bit Increment and Decrement
- DEC (HL)
- DEC (IX+d)
- DEC (IY+d)
- DEC r
- INC (HL)
- INC (IX+d)
- INC (IY+d)
- INC r
M. 8-bit Fast Accumulator
- CPL
- RLA
- RLCA
- RRA
- RRCA
N. 8-bit Shift and Rotate
- RL (HL)
- RL (IX+d)
- RL (IY+d)
- RLC (HL)
- RLC (IX+d)
- RLC (IY+d)
- RLC r
- RR (HL)
- RR (IX+d)
- RR (IY+d)
- RR r
- RRC (HL)
- RRC (IX+d)
- RRC (IY+d)
- RRC r
- SLA (HL)
- SLA (IX+d)
- SLA (IY+d)
- SLA r
- SRA (HL)
- SRA (IX+d)
- SRA (IY+d)
- SRA r
- SRL (HL)
- SRL (IX+d)
- SRL (IY+d)
- SRL r
O. Instruction Prefixes
- ALTD
- IOE
- IOI
P. Block Moves
- LDD
- LDDR
- LDI
- LDIR
Q. Control, Jump, and Call
- CALL mn
- DJNZ e
- JP (HL)
- JP (IX)
- JP (IY)
- JP f,mn
- JP mn
- JR cc,e
- JR e
- LCALL x,mn
- LJP x,mn
- LRET
- RET
- RET f
- RETI
- RST v
R. Miscellaneous
- CCF
- IPSET 0
- IPSET 1
- IPSET 2
- IPSET 3
- NOP
- SCF
S. New Instructions
- ADD SP,d
- ALTD
- AND HL,DE
- AND IX,DE
- AND IY,DE
- BOOL HL
- BOOL IX
- BOOL IY
- EX (SP),HL
- EX DE,HL
- IOE
- IOI
- IPRES
- IPSET 0
- IPSET 1
- IPSET 2
- IPSET 3
- LCALL x,mn
- LD (HL+d),HL
- LD (IX+d),HL
- LD (IY+d),HL
- LD (SP+n),HL
- LD (SP+n),IX
- LD (SP+n),IY
- LD A,XPC
- LD dd',BC
- LD dd',DE
- LD HL,(HL+d)
- LD HL,(IX+d)
- LD HL,(IY+d)
- LD HL,(SP+n)
- LD HL,IX
- LD HL,IY
- LD IX,(SP+n)
- LD IX,HL
- LD IY,(SP+n)
- LD IY,HL
- LD XPC,A
- LDP (HL),HL
- LDP (IX),HL
- LDP (IY),HL
- LDP (mn),HL
- LDP (mn),IX
- LDP (mn),IY
- LDP HL,(HL)
- LDP HL,(IX)
- LDP HL,(IY)
- LDP HL,(mn)
- LDP IX,(mn)
- LDP IY,(mn)
- LJP x,mn
- LRET
- MUL
- OR HL,DE
- OR IX,DE
- OR IY,DE
- POP IP
- PUSH IP
- RETI
- RL DE
- RR DE
- RR HL
- RR IX
- RR IY
T. Privileged Instructions
- BIT b,(HL)
- IPRES
- IPSET 0
- IPSET 1
- IPSET 2
- IPSET 3
- LD A,XPC
- LD SP,HL
- LD SP,IX
- LD SP,IY
- LD XPC,A
- POP IP
- RETI
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