Appendix C. Power Management

Appendix C describes the RCM2000 power circuitry.

C.1 Power Supplies

The RCM2000 requires a regulated 5 V ± 0.25 V DC power source.

An RCM2000 with no loading at the outputs operating at 18.432 MHz typically draws 88 mA, and an RCM2000 operating at 25.8048 MHz typically draws 120 mA. The RCM2000 will consume 13 mA to 15 mA of additional current when the programming cable is used to connect J3 to a PC.

C.1.1 Batteries and External Battery Connections

The RCM2000 does not have a battery, but there is provision for a customer-supplied battery to back up SRAM and keep the internal Rabbit 2000 real-time clock running.

Header J2, shown in Figure C-1, allows access to the external battery. This header makes it possible to connect an external 3 V power supply. This allows the SRAM and the internal Rabbit 2000 real-time clock to retain data with the RCM2000 powered down.

Figure C-1. External Battery Connections at Header J2

A lithium battery with a nominal voltage of 3 V and a minimum capacity of 165 mA·h is recommended. A lithium battery is strongly recommended because of its nearly constant nominal voltage over most of its life.

The drain on the battery by the RCM2000 is typically 10 µA when no other power is supplied. If a 950 mA·h battery is used, the battery can last more than 6 years:

Since the shelf life of the battery is 10 years, the battery can last for its full shelf life. The actual life in your application will depend on the current drawn by components not on the RCM2000 and the storage capacity of the battery.

C.1.2 Battery-Backup Circuit

The battery-backup circuit serves three purposes:

• It reduces the battery voltage to the SRAM and to the real-time clock, thereby limiting the current consumed by the real-time clock and lengthening the battery life.
• It ensures that current can flow only out of the battery to prevent charging the battery.
• A voltage, VOSC, is supplied to U5, which keeps the 32.768 kHz oscillator working when the voltage begins to drop.

VRAM and Vcc are nearly equal (<100 mV, typically 10 mV) when power is supplied to the RCM2000.

Figure C-2 shows the RCM2000 battery-backup circuit.

Figure C-2. RCM2000 Battery-Backup Circuit

VRAM is also available on pin 34 of header J2 to facilitate battery backup of the external circuit. Note that the recommended minimum resistive load at VRAM is 100 kW, and new battery life calculations should be done to take external loading into account.

C.1.3 Power to VRAM Switch

The VRAM switch, shown in Figure C-3, allows a customer-supplied external battery to provide power when the external power goes off. The switch provides an isolation between Vcc and the battery when Vcc goes low. This prevents the Vcc line from draining the battery.

Figure C-3. VRAM Switch

Transistor Q11 is needed to provide a very small voltage drop between Vcc and VRAM (<100 mV, typically 10 mV) so that the processor lines powered by Vcc will not have a significantly different voltage than VRAM.

When the RCM2000 is not resetting (pin 2 on U10 is high), the /RES_OUT line will be high. This turns on Q10, causing its collector to go low. This turns on Q11, allowing VRAM to nearly equal Vcc.

When the RCM2000 is resetting, the /RES_OUT line will go low. This turns off Q10 and Q11, providing an isolation between Vcc and VRAM.

The battery-backup circuit keeps VRAM from dropping below 2 V.

C.1.4 Reset Generator

The RCM2000 uses a reset generator, U10, to reset the Rabbit 2000 microprocessor when the voltage drops below the voltage necessary for reliable operation. The reset occurs between 4.50 V and 4.75 V, typically 4.63 V. The RCM2000 has a reset output, pin 37 on header J3, presented to the headers. The reset generator has a reset input, pin 38 on header J3, that can be used to force the RCM2000 to reset.

C.2 Chip Select Circuit

Figure C-4 shows a schematic of the chip select circuit.

Figure C-4. Chip Select Circuit

The current drain on the battery in a battery-backed circuit must be kept to a minimum. When the RCM2000 is not powered, the battery keeps the SRAM memory contents and the real-time clock (RTC) going. The SRAM has a powerdown mode that greatly reduces power consumption. This powerdown mode is activated by raising the chip select (CS) signal line. Normally the SRAM requires Vcc to operate. However, only 2 V is required for data retention in powerdown mode. Thus, when power is removed from the circuit, the battery voltage needs to be provided to both the SRAM power pin and to the CS signal line. The CS control circuit accomplishes this task for the CS signal line.

In a powered-up condition, the CS control circuit must allow the processor's chip select signal /CS1 to control the SRAM's CS signal /CSRAM. So, with power applied, /CSRAM must be the same signal as /CS1, and with power removed, /CSRAM must be held high (but only needs to be battery voltage high). Q13 and Q14 are MOSFET transistors with opposing polarity. They are both turned on when power is applied to the circuit. They allow the CS signal to pass from the processor to the SRAM so that the processor can periodically access the SRAM. When power is removed from the circuit, the transistors will turn off and isolate /CSRAM from the processor. The isolated /CSRAM line has a 100 kW pullup resistor to VRAM (R28). This pullup resistor keeps /CSRAM at the VRAM voltage level (which under no-power conditions is the backup battery's regulated voltage at a little more than 2 V).

Transistors Q13 and Q14 are of opposite polarity so that a rail-to-rail voltages can be passed. When the /CS1 voltage is low, Q13 will conduct. When the /CS1 voltage is high, Q14 will conduct. It takes time for the transistors to turn on, creating a propagation delay. This delay is typically very small, about 10 ns to 15 ns.