LD pd,ps+d     Load     Rabbit 4000 Instruction

Opcode	Instruction	Clocks	Operation
--	LD pd,ps+d	6 (2,2,2)	pd = ps +d
6D 0C d	LD PW,PW+d	6 (2,2,2)	PW = PW + d
6D 1C d	LD PW,PX+d		PW = PX + d
6D 2C d	LD PW,PY+d		PW = PY + d
6D 3C d	LD PW,PZ+d		PW = PZ + d
6D 4C d	LD PX,PW+d	6 (2,2,2)	PX = PW + d
6D 5C d	LD PX,PX+d		PX = PX + d
6D 6C d	LD PX,PY+d		PX = PY + d
6D 7C d	LD PX,PZ+d		PX = PZ + d
6D 8C d	LD PY,PW+d	6 (2,2,2)	PY = PW + d
6D 9C d	LD PY,PX+d		PY = PX + d
6D AC d	LD PY,PY+d		PY = PY + d
6D BC d	LD PY,PZ+d		PY = PZ + d
6D CC d	LD PZ,PW+d	6 (2,2,2)	PZ = PW + d
6D DC d	LD PZ,PX+d		PZ = PX + d
6D EC d	LD PZ,PY+d		PZ = PY + d
6D FC d	LD PZ,PZ+d		PZ = PZ + d

Flags				ALTD			IOI/IOE
S	Z	L/V	C	F	R	SP	S	D
-	-	-	-

Description

Loads pd (any of the 32-bit registers PW, PX, PY or PZ) with the sum of ps (any of PW, PX, PY or PZ) and the 8-bit displacement d. These instructions cannot be used for general 32-bit arithmetic because the addition depends on the upper two bytes of ps. If the upper two bytes are all 1's, then it is 16-bit addition. The following example illustrates this point:

ld PW,0xFFFFFFFF
ld PW,PW+1            ;yields PW=0xFFFF0000

ld PW,0x7FFFFFFF
ld PW,PW+1            ;yields PW=0x80000000