*****************************************************************************
*                 Release Notes for JTAG-Booster V4.xx                      *
*               Copyright (c) 2000 FS FORTH-SYSTEME GmbH                    *
*                                                                           *
* This file contains release notes and last minute changes relating to the  *
* JTAG-Booster.                                                             *
*                                                                           *
* Contents:                                                                 *
* 1. Revision History                                                       *
* 2. Known Problems                                                         *
* 3. Documentation Update                                                   *
*****************************************************************************


1. Revision History
===================

Version 4.11, 
-------------------------
- AMD AU1000: Bugfix pin definition of RD30
- AMD AU1100: Bugfix pin definition of RAD13 and PCE1#
- AMD AU1500: Bugfix pin definition of USBDM
- Added support for AMD AU1550. 
  NAND flash support not included as standard functionality, 
  but can be provided on customers request. 
- Added support for NetSilicon NS9360

Version 4.10, 10/22/2004:
-------------------------
- Support for ST Flashes with D-Mask, i.e. M29W800DB
- New option /LSB1ST for SPI EEPROMs. 
  Some devices need the least significant data bit sent/received first. 
  Addresses are still sent/received most significant bit first.  

Version 4.09, 09/29/2004:
-------------------------
- Support for NetSilicon NS9750/NS9775
- Automatic unlock for locked blocks within Intel StrataFlash type J5 and J3
- Bugfix in unlock function for Intel StrataFlash type K3. Was new bug in 
  version 4.08.

Version 4.08, 08/05/2004:
-------------------------
- CFI support integrated. See below for description
  To detect Mirror Bit types, the option /CFI must
  specified in the command line.
- Support for SPI EEPROMs added. Command format for
  I2C functions has changed. See below for description
- Support for write page mode of serial EEPROMs added.
  See below for description.
- New function /HWTEST added

Version 4.07, 03/12/2004:
-------------------------
- New Option /NOWRBUFF to suppress usage of
  flash write buffer.
- Bugfix for Micron MT29F640J3. 
  Additional FLASH-RESET command needed after
  CLR-STATUS-REGISTER command.
- Optimized erase in targets with onchip debug.
  An block which contains 0xFF in all cells, is
  not erased before programming. This speeds up 
  programming of initially unprogrammed flashes 
  in production process. This feature is not available 
  with boundary scan.    

Version 4.06, 10/28/2003:
-------------------------
- Bugfix in calculating checksum,
  for targets with 16bit flash and an odd file length.
- Bugfix in checking command line parameters of the
  type /OPTION=. In case of an invalid nummber, a wrong
  string was printed.

Version 4.05, 09/11/2003:
-------------------------
- Support for new targets available:
  - IBM PPC405EPr
  - Samsung S3C2410
  - Intel XScale IXP425
- Support for STM Flashes in byte mode
- Bugfix for STM 29Wxxx flashes. 
  Unlock Bypass Reset command added.
- INI-File no longer loaded for functions /SNAP and /SAMPLE
- Support for Intel Flashes for ARM7TDMI

Version 4.04, 03/30/2003:
-------------------------
- Release for ARM7TDMI
- Support for additional parallel port interfaces for ARM7TDMI:
  /UNCBAS -> DB25 on FS FORTH-SYSTEME UNCBASE
  /PLS    -> Parallel port interface used by PLS
  /PPJARM -> Parallel port interface used for ARM (=Wiggler for ARM)
- High speed flash programming for ARM7TDMI, 100kByte/sec

Version 4.03, 03/20/2003:
-------------------------
- Support for parallel port JTAG on UNC20/UNCBAS from FS FORTH-SYSTEME

Version 4.02, 03/07/2003:
-------------------------
- Support for Intel XScale family added, IXP425 actually not supported
- ST Flashes now supported again. Support was missing in Version 4.01.

Version 4.00, 02/02/2002:
-------------------------
Main release of the JTAG-Booster. The JTAG-Booster is now available for the 
following targets:
- Intel 386EX
- AMD ElanSC400
- AMD ElanSC520
- Intel StrongARM SA-1100
- Intel StrongARM SA-1110
- IDT Companion 79RC64145
- Analog Devices ADSP-21060/21061/21062
- Analog Devices ADSP-21065
- Analog Devices ADSP-21161

Main enhancements to earlier 3.xx releases:
- Many Flash parts added
- Flash library modified to reduce number of entries
  Dual parts (i.e. AM29F010*2) removed from table.
  Any 8 bit part can be used in dual or quad configuration.
  Any 16bit part can be used in dual configuration.
  Switching between single, dual and quad mode is done appropriate to the bus width.
  Parts, which can be switched between 8 and 16 bit bus interface,
  now have only one entry in the table,
  i.e. AM29F100TW and AM29F100TB are reduced to AM29F100T.
  Switching between 8 and 16 bit bus interface is done appropriate to the
  bus width.
  An additional option /BYTE-MODE forces an 8 bit bus interface
  on the 16/32 bit bus to configure for dual/quad configuration.
- Support for 32 Bit target data bus size
- Write cycles are realized with write setup per default.
  The option /NOWRSETUP switches to the faster mode without write setup,
  which was the default for 3.xx versions.  
- WinNT support included in package
- Support for I2C-Parts with 3 byte addresses
- Flash programming is always done with cell-by-cell verify.
  The option /VERIFY is no longer needed.


2. Known Problems
=================
- SRAM-Test is not reliable on FS FORTH-SYSTEME module 386DRAM
- Option /LATTICE does not work on module 386DRAM
  (Error message: Wrong Flash Identifier 90909090)
- Option /TRITON (simple parallel port cable) does not 
  work with JTAG250 and JTAG255.


3. Documentation Update
=======================

This chapter contains the documentation of new features.

2.2 CFI Support
---------------

To be prepared for future flash chips, the JTAG-Booster
now integrates support for flashes with CFI interface.

Actually CFI support is activated by adding the command line option
/CFI. The JTAG-Booster then automatically searches in all
available bus widths for all possible flash types and configurations
instead of searching for the JEDEC identification code. 

In case of an error add the command line option /CFIDEBUG
and redirect the program output into a file. Sending us this file
helps us in solving problems. 

2.3 Support for serial (SPI and I2C) EEPROMs
---------------------------------------------

Usage:   JTAGxxx  /PSER   [optionlist]

In additon to the already available support for I2C EEPROMs
the JTAG-Booster is now able to programm, verify and read back
serial EEPROMs with a SPI interface. To get a compact command
format for several devices with a serial interface,
the command format for I2C devices has changed:

Function mames have changed: 
/PI2C     -> /PSER
/VI2C     -> /VSER
/RI2C     -> /RSER
/DUMPI2C  -> /DUMPSER

Option names have changed:
/I2CCLK=  -> /SERCLK=
/I2CDAT=  -> /SERDAT=
/I2CDATI= -> /SERDATI=
/I2CDATO= -> /SERDATO=
/I2CBIG   -> /SERBIG

New options:
/SPI       : activates the SPI driver, default is I2C
/MWIRE     : activates the Micro Wire driver, default is I2C
             Chip Select is high active
             Actually only the M93C06 and the M93C46 are supported
             Actually only 16 bit mode is supported.
/SERCS     : Specifies the chip select for a SPI device
/SERBUFF=  : Activates write page mode
/LSB1ST    : Some devices need the least significant data bit sent/received first. 
             Addresses are still sent/received most significant bit first. 
             This option does not affect the behaviour of accessing I2C devices. 

A typcial command line for programming a serial EEPROM with
a SPI interface looks like the following:
JTAGxxx /PSER myfile.bin /SPI /SERCLK=P1.0 /SERDATO=P1.1
                         /SERDATI=P1.2 /SERCS=P1.3
The option /SPI activates the SPI driver instead of using the
I2C driver. Please note, that the CPU pin specified with the
option /SERDATO= is an output pin for the CPU and must be connected
to SERIN on the SPI device side.
As default 16 bit addresses are used. If the option /SERBIG is specified,
a 24 bit address is sent to the SPI device.
The Option /SERDAT= specifies a bidirectional pin for the I2C driver
and is not allowed when using the SPI driver.

For I2C and SPI devices the write page mode can be activated by
specifying the option /SERBUFF=. Using this feature increases the
programming performance. Please note: Some SPI devices do not support
single byte write mode. For these devices the option /SERBUFF= must be
specified in the command line. 


2.4 New function HWTEST
-----------------------

Usage:   JTAGxxx  /HWTEST /CFG=myfile.cfg [optionlist]

For targets with OCD support, the new function /HWTEST 
is included. This function does nothing else, than 
stepping trough the CFG-file and then terminate the 
program.









