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This table contains divisors to put into TATxR registers. All frequencies that allow 57600 baud up to 30MHz are shown (as well as a few higher frequencies). All of the divisors listed here were calculated with the default equation given on the next page.
1.8432 3.6864 5.5296 7.3728 9.2160 11.0592 12.9024 14.7456 16.5888 18.4320 20.2752 22.1184 23.9616 25.8048 27.6480 29.4912 36.8640 44.2368 51.6096 58.9824
The default equation for the divisor is:
If the divisor is not an integer value, that baud rate is not available for that frequency (identified by a "-" in the table). If the divisor is above 255, that baud rate is not available without further BIOS modification (identified by a "*" in the table). To allow that baud rate, you need to clock the desired serial port via timer A1 (by default they run off the peripheral clock / 2), then scale down timer A to make the serial port divisor fall below 256.
Timer A can be clocked by the peripheral clock (PCLK) in addition to the default, which is the peripheral clock/2 (
PCLK/2
). Furthermore, the asynchronous serial port data rate can be 8x the clock in addition to the default of 16x the clock. Therefore, in addition to the equation above, the following equations may be used to find the asynchronous divisor for a given clock frequency.Timer A clocked by
PCLK/2
, serial data rate = 16 x clock
Timer A clocked by PCLK, serial data rate = 16 x clock:
Timer A clocked by PCLK/2, serial data rate = 8 x clock:
Timer A clocked by PCLK, serial data rate = 8 x clock:
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